********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Jun 09, 2014
*ECN S14-1175, Rev. B
*File Name: Si1403CDL_PS.txt and Si1403CDL_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si1403CDL D G S 
M1 3 GX S S PMOS W= 500000u L= 0.25u 
M2 S GX S D NMOS W= 500000u L= 4.125e-07 
R1 D 3 4.070e-02 TC=4.980e-03 9.358e-06 
CGS GX S 9.709e-11 
CGD GX D 1.642e-11 
RG G GY 7
RTCV 100 S 1e6 TC=7.452e-05 -1.142e-06 
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 
**************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 3e-8 
+ RS = 4.002e-02 KP = 4.585e-06 NSUB = 8.544e+15 
+ KAPPA = 2.290e-03 ETA = 2.468e-04 NFS = 1.323e+12 
+ LD = 0 IS = 0 TPG = -1) 
*************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 3e-8 
+NSUB = 4.157e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.000e-08 T_MEASURED = 25 BV = 21 
+RS = 3.986e-02 N = 1.834e+00 IS = 9.892e-08 
+EG = 8.063e-01 XTI = 1.000e+01 TRS1 = 1.367e-03 
+CJO = 8.148e-11 VJ = 3.000e-01 M = 2.314e-01 ) 
.ENDS 
